【 Weak current College 】 memory bandwidth of relevant information which

1. What is the memory bandwidth

Memory is the memory controller (typically located on North Bridge chip) and a bridge between the CPU or with the warehouse. Obviously, the memory capacity to decide the size of the "warehouse" and memory bandwidth determines the width of "bridges", both of which are indispensable, it is often said of the "memory" and "memory speed". In addition to the memory capacity and memory speed, delay cycle is the key to its performance. When the CPU needs data in memory, it will issue a memory controller, the implementation of the requirements, the memory controller then you will be asked to send to memory, and when it receives data throughout the life cycle of the CPU address (from the CPU to memory controller, memory and then back to the CPU). There is no doubt that shorten the whole cycle is the key to improving memory speed, it can be compared in the work of the police officers on the bridge, its capacity is also the conductor of the dredging decided that two degrees. Faster memory technology on the overall performance is a significant contribution, but increases the memory bandwidth is only part of the solution, the data is transferred between the CPU and the memory of the time usually spent than processor execution function takes longer, as the buffer to be widely used. In fact, the so-called buffer is CPU level cache and L2 cache memory, they are the "CPU bridge" and "little bridges between." In fact, the L1 cache and L2 cache is SRAM, we also can be broadly understood as "memory bandwidth", but now seems to be better interpreted as "FSB", so we simply mentioning. Prior notice to you, "FSB" and "memory bandwidth" is the close link between, we will be testing in a more profound understanding.

2. calculation of the memory bandwidth

Bandwidth = bus width × bus frequency × one clock cycle exchange the number of packets

FSB and memory bandwidth are equal, you do not have a bottleneck problems, if the memory bandwidth is less than the FSB is the formation of memory bandwidth bottleneck, unable to fully develop the system performance.

Now in single channel memory controller typically 64, 8 x 2 m-bit equivalent to 1 byte, converted to bytes 64/8 = 8, then multiplied by the memory of the operating frequency, if DDR memory is then multiplied by 2, because it is based on the sd memory twice the speed of data transfer, so

The so-called dual-channel DDR, chipset can be in two different data channel separately addressable, read the data. These two independent work of memory channel is dependent on two separate parallel work, bit wide memory controller for 64-bit, thus enabling normal DDR memory can reach 128-bit's bandwidth, memory bandwidth is twice that of single-channel

3. the importance of the memory bandwidth

Memory bandwidth that would be so important? in answering this question, let's briefly take a look at the system work. Basically when the CPU after receiving the directive, it will be the first to the CPU level caching (L1Cache) to find relevant data, while level cache is run with the same frequency of the CPU, but due to the smaller, so you can always hit. At this time the CPU will continue to the next level of L2 cache (L2Cache) looking for the same reason, when the required data in the L2 cache in no case, will continue to turn L3Cache (if so, such as the K6-2 + and K6-3), memory and hard drive. Since the current system of processing the amount of data is huge, so almost every step operation must go through memory, this is the whole system work most frequently. As a result, memory performance, to a certain extent determines the system's performance in multimedia design software and 3D game performance even more obvious. 3D graphics memory bandwidth (perhaps called graphics memory bandwidth more appropriate) the importance of also is self-evident, or even its role than system memory bandwidth. As we all know, the display card in pixel rendering will need different from video memory read and write data in the buffer. These buffers are placed to describe pixel ARGB (alpha, red, green, blue) color data element, the z value of placing pixels (used to describe pixel depth or visibility of data). Obviously, once you have the z axis data, memory burden will immediately banked steeply raise, plus a variety of texture, depth complexity rendering, 3D effects, their workload can be imagined. In more cases, memory bandwidth of importance beyond the memory capacity.

4. How do I increase the memory bandwidth

Memory bandwidth calculation method is not complicated, you can follow the following calculation formula: bandwidth = bus width × bus frequency × one clock cycle exchange the number of packets. DDR technology allows us to feel the benefits of increasing the number of packets, it makes the memory bandwidth crazy double. Of course, increase the number of packets is not limited to on in the memory, through multiple memory controller can work in parallel to the same effect, which is now popular dual channel DDR chipset. In fact, dual-channel DDR memory controller and not a new invention, since as early as the age, RDRAM RAMBUS has used a similar technique, but then the bus width only RDRAM 16Bit, cannot be equated with DDR supercomputer ' where. Memory technology development to this stage, four-channel memory controller that there was only a matter of time, VIA the SiS QBM technology and supports four channel RDRAM's chipset, these are the future direction of development. As for graphics, we are more sensitive to its graphics memory bandwidth, even many manufacturers use to distinguish between high and low end product of important aspects. The same is to use the DDR graphics memory products, the width of the product will 128Bit showed much better than 64Bit width products. Of course, increase the memory frequency is also a kind of solution, but its effect is not evident, and will greatly increase thecosts.
R > 5. how to identify product memory bandwidth

For memory, identify memory bandwidth is a fairly simple thing, because the SDRAM, DDR, RDRAM this three memory in appearance has a very big difference, only need to identify the different frequency of DDR memory. At present there are mainstream DDR memory and DDR1333 DDR1066 DDR800, which after a three-digit number representing the operating frequency. Through the memory on the identity, nature can easily identify its specifications. In contrast, the video memory bandwidth of recognition will be difficult for some. Here, we should seize the "graphics memory bandwidth" and "memory frequency" two important technical indicators. Graphics memory bandwidth is calculated by: monolithic graphics particle bits wide × video memory particles, video memory, the frequency is determined by the "1000/memory granules Nabi seconds to decide. In General, we can from video memory particles a bunch of numbers to see the last 2 two seconds, it is satisfied that it was informed from the video memory frequency. As for monolithic graphics memory bandwidth, we can only particles in the Internet. In addition, the use of robust master can also detect the video card memory total bandwidth, open ar master you can see in the video. In addition, you can view the memory information in storage.