【 Weak current College 】 network applies the selected which processor

With the emergence of multi-core processors, many network communications and network security application developers have their eyes from the x 86 architecture turned to private or typical of multi-core platforms. Network communications applications and security product vendors (hereinafter referred to as application developers) optimistic about multi-core, and network processors ever popular, is a very strong customer demand driven. The original demand from users on the network business and performance growth development needs. Network business application as early as just a simple IP network interconnection, and today it has gradually evolved into a fine analysis of the application tier and the control of network traffic for more in-depth analysis, computing power is increasingly high; at the same time, the network application needs to process the input data is constantly growing. Traditional x 86 architecture is very flexible, but it cannot effectively resolve on higher flow calculation ability while they work.
In fact, every time a new, so-called can flow for high performance and flexibility of a dedicated chip was born, the application developer is a stimulating and encouraging, especially such professional chip can also provide software developers with a common programming ability, therefore, multi-core processors are preferred to be reasonable.
There are three kinds of the schema quality
It is understood that application developers require a dedicated chip through the following professions: pattern matching, in the message flow to find a specific bit, byte mode capabilities, such as string matching, message features etc; quick reference, according to the message flow to a specific field to lookup operations, such as routing table, flow classification list, session list, etc.; packet Checksum calculation, such as MD5 verification, validation, encryption and decryption operations, etc.; on message for bit domain operation; queue scheduling andmanagement; report of the cultural relic protection order, etc.
Network processor first in chip-level for the application developer provides the basis of ability, but after nearly 10 years of development, network processor, won the small number of users, many application developers have invested a lot of research and development strength but did not achieve the expected massive success. The root cause is because from the x 86 architecture migration to network processor cost is too high, an impact on the existing software structure is too large for hardware will give software developers bring heavy development costs and maintenance costs. Therefore, network processor, a small number of big manufacturers of core product has been applied. Expensive development costs due to the lack of large network processor base user groups, user groups shrinking direct brings network processor applied nothing came.
Used for network communication device for multi-core processors, internal also integrates the major part of the work or even full functionality. In addition, multi-core processors for application developers flexibility higher packet processing computing power, the author of OCTEON Processors, as well as to develop, based on Linux using C code to programming and using these features, but excited excitement has to stand on the engineering perspective on a very practical question: migration to multicore processors, how much does take? similar will be caught in a that network processor "quagmire"?
And network processors, multi-core processors for application developers "development based on Linux". We all know that on x 86 numerous network developed applications are based on Linux and open source on top of rich applications that can run on x 86 Linux systems and procedures almost without modification and directly portable to MIPS (a RISC processor), which is a multi-core CPU. The natural is Linux support SMP architecture, you can have multiple CPU cores at the same time being used so that the workload of the transplantations of risk is very small, inputs are controllable.
But at the same time, the SMP architecture does not provide for network application processing, linear expansion — that is, a nuclear deal 100M, does not mean that the two nuclei can handle 200M, 16-core can handle 1600M, SMP schema will most likely only have 16-core with 1000M of processing performance, so multiple nuclear capacity was software schema wasted, direct consequence is the application of the equipment cost of the machine. In addition, many for the multi-core processors in packet processing acceleration capability, you need to have special software to "activate", Linux does not provide ready-made activation code, application developer if you want to use a lot of kernel, you must also write the code yourself to activate these features.
In other words, multi-core processors to use Linux application developer provides a very easy to use development platform, but how to use this platform, you need application developer effort. We know that networks can be logically divided into control plane and data plane, Linux on x 86 is the control plane and data plane in one of the SMP usage, control plane and data plane in one, but you want to allow network applications to multi-core and use, it is necessary to control plane and data plane separation and isolation of well decide the multi-core applications delivered price/performance ratio.
This enables us to mention third schema x86 + FPGA/ASIC, the schema from the design right from the start with a very distinct data plane and control plane separation of features, this framework is a good way to achieve high performance. Unfortunately, due to the FPGA or ASIC technology takes a lot of research and development investment, this architecture became a few big vendors of proprietary schema, it is for this reason, people often have no way of analysis and verification of such a framework should be and how Linux and the open system.
ASIC and FPGA/multicore integration or trend
Review network application processor history, observation of CPU + FPGA/ASIC schema development, tracking of multi-core processor architecture in development, we can make a summary of the comparison.
First, the purpose of the three schema is the application that you want to network communications to provide high performance of packet processing capabilities that provide a high-performance data-planeEngine; although they appear in a different time period, but the basic capacity is the same.
Second, you can understand the network processor to multi-core architecture of network processors in the primary stage, did not build a sufficiently powerful developer groups; and multi-core processor then takes full advantage of Linux this network application developers really like open platform, in order to attract developers, building development communities offer a lot of imagination.
Third, compared with multi-core processor, FPGA/ASIC in chip enables network application data plane, but as the FPGA/ASIC implementation cost is very high, a professional manufacturer specialized in business support, data plane engine to evolve to meet a growing demand for rich Internet applications. But it is the professional manufacturer and makes FPGA/ASIC manufacturers from a handful of private schema becomes fit for many Web application developers for the secondary development of open architecture.
Fourth, although multi-core processors have many apparent advantages, but to the potential of multi-core processor fully into play, you must resolve the traditional application software in the data plane and control plane separation problem. Therefore, only in the multi core also appeared on a standardized, open data plane engine and the engine can and traditional mature software seamlessly smooth integration, multi-core processors are likely to flourish in the network application.
Fifth, the network application on data plane engine requirements, in addition to high-performance, standardized and open, feature-rich, easy to expand demand is also growing strongly. Now, multi-core and FPGA/AISC can integrate application? FPGA/ASIC implement standardized session layer and network layer handles the implementation of flexible rich application tier business expansion, will become the future trend of a? in my opinion, this is likely to become future trends.
Sixth, the network application manufacturer's expertise and the advantages they can deepen our understanding of user needs, to user needs-based mining many new applications. Realization of data plane, whether chip-level FPGA/ASIC or multi-core data plane engine, are very close to the bottom of the networking infrastructure, a standard, open, professional, easy to expand data plane engine will provide network bring great new application development thrust. Of course, professional data plane engine acquire, whether by FPGA, or multi-core implementations, or a combination of both, needs to have the support of professional manufacturers.