【 Weak current College 】 on CPU and cache

Speaking of CPU, have to say is CPU cache, CPU cache has become a measure of CPU performance indicators of a need, then what exactly on the CPU cache CPU performance impact?
We know that the CPU executes instructions, the execution results in a call to "register" symbol, as the "register" integrated in the CPU, the CPU and ALU, constitute an important element, so register directive was soon CPU accesses, but after all, the register size is too small, a large number of required CPU instructions and data also in the memory (RAM), so the CPU for complete instructions, frequently receive instructions to memory, the data is sent.
Due to the memory of the CPU processing speed is far below, so traditional system bottleneck here creates a processing instruction, the CPU is often time consuming to do while waiting for memory.
To resolve this problem, the people in the CPU in a much faster than the memory of the "Cache", this is the oldest "cache".
L1 cache is fully synchronized with the CPU to run in memory, that is, we often say the L1 cache, if the CPU needs data and instructions are in the cache, then the CPU doesn't have to wait for, directly from the L1 cache (L1) in the data, if the data is not in the L1, L2 cache CPU then (L2) to extract data, greatly improving system efficiency.
Argument of the CPU cache works
No CPU cache before
We can visualize the CPU arithmetic unit counts as one is located in the city centre of factories, the memory as a factory set up in the suburbs of an area of A large warehouse.
Factory production needed raw materials each time A distribution warehouse in the distance, and arrived at the warehouse, but wait for warehouse ready material, intermediate waste a lot of time. This is the CPU frequency is not constant, CPU and memory data exchange are not synchronized.
But suddenly one day, due to A shortage of funds, the warehouse from the suburb of "move to" exurb, raw materials and finished products in the factory and warehouse A transport between the time that it takes longer, factory for production of raw materials were inadequate, often in a no-load condition. This means that when the CPU frequency increases, the CPU and memory data waiting time will be longer
Increase L1Cache
To work around the CPU and memory data is not synchronized with this system bottlenecks, one way is close to the factory's urban setting a small warehouse B (L1Cache).
Usually the most urgent needs of the production, with most of the raw materials (instructions and data) from A warehouse (memory) to B (L1Cache) warehouse, factory production needed raw materials can be quickly provisioned over, reducing no-load operation time. When the necessary raw materials in warehouses B not found (cache misses), still to the warehouse in A (memory), although inevitably make factory and entered a no-load, or part of the no-load (CPU wait several clock cycle), but after all the waiting time is greatly reduced.
Tidbits: cache has a "read-ahead" feature that is available through certain algorithms, guess the next desired data, and get into the cache.
Then Tim L2Cache
As the frequency of the CPU, and memory are not synchronized to Exchange data between the phenomenon more obvious, can be understood as A storage (memory) is removed from the suburbs, moved to more distant places. Address the issue of a better way to the edge of the city and established a warehouse in b-C of the warehouse, that is, we say that the L2 cache.
Its role is to put A suburb outside of the warehouse (memory) in the most urgent materials (instruction) to the warehouse, factory if C in warehouse b cannot find the required materials, can be found in the warehouse C instead flew to A warehouse where to find and save a lot of time.
Typically, L1 L2 including all data, plus some additional data. In other words, the L1 and L2, L2-memory is the master and slave relationship, so CPU cache appear more effectively addresses the empty waiting for CPU resources waste problem.
CPU cache better?
Of course, the CPU cache and not the better, because the cache is a fast, expensive static RAM (SRAM), since each SRAM memory cells are 4 ~ 6 transistors, increase cache will bring the number of CPU integrated transistor, caloric value is increased, to design and manufacture of great difficulty. So even if the cache is very large, but if the design of unreasonable delay will result in the cache, CPU performance may be improved.