【 Weak current College 】 cpu knowledge encyclopedia (1)

1. clock speed

Clock speed is also called clock frequency, MHz, the units are used to represent the operation speed of the CPU. CPU clock speed = FSB × multiplier coefficient. Many people think the clock speed to determine the CPU speed, this is not only a one-sided, but also for the server, this understanding also appeared. So far, none of the defined formula to achieve the clock speed and the actual operation speed numerical relationship between the two, even two processor manufacturers Intel and AMD, at this point there was great controversy, from Intel's product development trends, you can see that Intel's focus on strengthening their clock speed of development. Like other processor manufacturers, someone once took a fast 1 g up to us to do more, it's operating efficiency is equivalent to 2 g Intel processor.

Therefore, the CPU clock speed and CPU actual computing capacity is not directly related to the frequency indicated in the CPU in the speed of the pulse signal shocks. In Intel's processors, we can also see examples: 1GHzItanium chip can behave almost like 2.66GHzXeon/Opteron as fast or 1.5GHzItanium2 approximately with as fast as 4GHzXeon/Opteron. CPU speed depends on the CPU's line of performance indicators.

Of course, the clock speed and the actual operation speed is concerned, can only say that the clock speed is only one CPU performance, and not representative of the overall performance of the CPU.

2. the FSB

FSB CPU benchmark frequency, unit is MHz. CPU FSB decided to block the operating speed of the motherboard. Bluntly, in the desktop, we are talking about overclocking, are ultra CPU FSB (of course in General, the CPU multiplier are locked) believe that it is very easy to understand. But for the server CPU, overclocking is absolutely not allowed. Said CPU determines the speed of the motherboard, the two are executed at one time, if the server CPU overclocked, changed the FSB will have to run asynchronously (desktop many Board supports asynchronous operation) it would create an entire server and system instability.

At present the vast majority of computer systems in the FSB is the memory and motherboard running speed, in this way, can be understood as the FSB CPU and memory are connected directly, to achieve the synchronization between the running state. FSB and front side bus (FSB) frequency is very easy to be confused with, the following FSB about our talk about the difference between the two.

3. front side bus (FSB) frequency

Front side bus (FSB) frequency (i.e. bus frequency) is a direct impact on CPU and memory speed direct data exchange. A formula can be calculated, i.e. the data bandwidth = (bus frequency × data bandwidth)/8, maximum bandwidth data transmission depends on all at the same time, the width of the data transmitted and the transmission frequency. For example, now support 64-bit Xeon Nocona, FSB is 800MHz, according to the formula, its data transfer maximum bandwidth is 6.4GB/seconds.

FSB and front side bus (FSB) frequency difference: front side bus speed is the speed of data transmission, the FSB is synchronized between the CPU and motherboard running speed. In other words, 100MHz FSB especially Digital pulse signal in 10 million times per second shock; 100MHz FSB refers to every second CPU acceptable data transfer volume is 100MHz×64bit÷8Byte/bit = 800MB/s.

In fact, "HyperTransport" framework, so the actual sense of the front side bus (FSB) frequency has changed. Before we know IA-32 schema must have three important components: memory controller Hub (MCH), I/O controller Hub and PCIHub, like a typical chipset Intel Intel7501, Intel7505 chipset for dual Xeon processor tailored, they contain MCH provides for CPU frequency in the 533 MHz front side bus, with DDR memory, front side bus bandwidth can reach 4.3GB/seconds. But as processor performance continues to increase at the same time to the system architecture brings alot of problems. The "HyperTransport" architecture not only solves the problem, but also more effective in improving bus bandwidth, for example AMDOpteron processor, flexible HyperTransportI/O bus architecture allows it to integrate the memory controller, the processor does not pass the system bus to chipset and direct exchange data and memory. Case, front side bus (FSB) processor frequency will not know AMDOpteron from which talked about.

4. CPU bits and word length

Bits: digital and computer techniques, code in binary only "0" and "1", which is "0" or "1" in the CPU are a "bit".

Word length: computer technology in the CPU in the unit of time (one time) can handle the number of bits of binary called words long. It can handle the word length of 8-bit CPU is usually called the 8-bit CPU. Similarly, 32-bit CPU can handle the unit of time as a 32-bit word-length binary data. Byte and word length difference: as the commonly used English characters with 8-bit binary can represent, so usually it will be 8-bit called a byte. The length of the word-length is not fixed, for different CPU, word length of length. 8-bit CPU time can only handle one byte, but the 32-bit CPU time can handle 4-byte words long, similarly to the 64-bit CPU time can handle 8 bytes.

5. the multiplier factor

MultiplierFactor is the CPU FSB clock speed and relative proportions between. In the same FSB, the higher the CPU multiplier of higher frequency. But in fact, identical to the FSB, the high frequency of the CPU itself isn't very big meaning. This is because the CPU and system data transmission speed is limited, the blind pursuit of high-frequency and clock CPU appears obvious "bottleneck" effect — CPU from the system get data limit speed to meet the speed of the CPU operation. The general pattern in addition to the works of Intel's CPU is locked the multiplier of AMD, but do not lock before.

6. Caching

Cache size is also one of important indicators of CPU and cache structure and size of the CPU speed is very large, the cache of the CPU operating frequency is generally very high, and the processor frequency operation efficiency than system memory and hard drive. Actual work, the CPU is often required to repeat the same data block read and cache capacity increases, you can greatly enhance the CPU reads the data of hits within, rather then to the memory or hard disk seek to improve system performance. But because the CPU chip area and cost factors to consider, cache are very small.

L1 Cache (L1 cache) is the first layer of CPU cache, divided into data cache and the instruction cache. Built-in L1 cache size and structure on the CPU performance impact is large, but the buffer cache are composed by a static RAM, the structure is more complex, the CPU chip area must not be too large, L1 L3 cache capacity cannot be too large. General Server CPU capacity of L1 cache is usually 32 — 256KB.

L2 Cache (L2 cache) is the CPU of the second level cache, divided into internal and external two chips. Internal chip L2 cache is the same as running the velocity and frequency, and external L2 cache is only half the clock speed. L2 cache size will also affect the CPU's performance, the principle is better, and now the maximum CPU capacity for household use is 512KB, server and workstation use CPU L2 cache more up to 256-1MB, some as high as $ 2MB or 3MB.

L3 Cache (L3 cache), divided into two types of early is an external, now are built-in. But it's practical effect is that the application of L3 cache can further lower memory latency while lifting the large data amount calculation time processor performance. Lower memory latency and improve the ability of large amounts of data are calculated on the game. In the server field increase L3 cache performance is still a significant upgrade. For instance, has a large L3 cache configuration using physical memory is more effective, so it is slow disk i/o subsystem can handle more data requests. With a large L3 cache processor provides more efficient file system caching behavior and a short message and processor queue length.

In fact, the earliest L3 cache is applied in the AMD launch K6-III processor, then L3 cache is limited to the manufacturing process have not been integrated into the chip, which is integrated on the motherboard. The only and the system bus frequency synchronization of L3 cache and the main memory is actually not much difference. Then use L3 cache is Intel server market the Itanium processor. Then is P4EE and Xeon MP. Intel also plans to launch an Itanium2 processor 9MBL3 cache, and cache later 24MBL3 Itanium2 processor dual core.

But basically the L3 cache processor performance improvement is not very important, for example with 1MBL3 cached XeonMP processor is still not the Opteron opponent, it can be seen that the FSB, than cache increase brings more effective performance boost.

7.CPU extended instruction set

Relying on the directive to calculate the CPU and the control system of each of the CPU when the design provides for a series of its hardware compatible instruction set. The strength of the directive is also an important indicator, CPU instruction set is to improve the efficiency of the microprocessor is the most effective tool. From the current mainstream architecture, instruction set can be divided into complex instruction set and reduced instruction set, but from the concrete application, such as Intel's MMX (MultiMediaExtended), SSE, SSE2 (Streaming-Singleinstructionmultipledata-Extensions2), SEE3 and AMD 3DNow! are CPU extensions, enhanced CPU multimedia, graphics, images and the processing power of the Internet, etc. We usually put the CPU extensions called "CPU instruction set". SSE3 instruction set is the smallest of the MMX instruction set, contains 57 command, SSE contains 50 commands and SSE2 contains 144 command, SSE3 contains 13 command. There is also the most advanced SSE3 instruction set, Intel Prescott processor already supports AMD SSE3 instruction set, in the next dual-core processors including SSE3 instruction set to on, the entire us $ processor will also support this instruction set.

8.CPU kernel and i/o voltage

Starting from 586CPU, CPU voltage divided into core voltage and two I/O voltage, typically CPU core voltage I/O voltage is less than or equal to. The size of which the core voltage is based on the CPU of the production process, production process in General, the lower the kernel operating voltage; I/O voltage is generally 1.6 ~ 5V. Low voltage can resolve excessive power consumption and high fever.

9. the manufacturing process

Manufacturing technology of Micron IC refers to the internal and the distance between the circuitOff. Manufacturing technology trend is, the higher the intensity. Density, the higher the level of IC circuit design, means that the same-sized area of IC, you can have a density higher and more complex circuit design. Now the main 180nm 130nm and 90nm,. Recent official has expressed a 65nm manufacturing process.